Cadence Collaborates with Arm

Intent is to accelerate Neoverse V2 Data Center Design initiatives with Cadence AI-driven flows.

Intent is to accelerate Neoverse V2 Data Center Design initiatives with Cadence AI-driven flows.

Cadence closely collaborates with Arm to provide this jump start for our partners designing Arm-based server systems. Image courtesy of Cadence and Arm.

Cadence Design Systems, Inc. announced an expanded collaboration with Arm to speed data center silicon success on the Arm Neoverse V2 platform. Through the collaboration, Cadence fine-tuned its artificial intelligence-driven RTL-to-GDS digital flow for Neoverse V2 and delivered corresponding 5nm and 3nm Rapid Adoption Kits (RAKs).

In addition, the Cadence AI-driven verification full flow supports Neoverse V2, providing designers with optimal verification throughput and preparedness for Arm SystemReady compliance, the companies report.

AI-Driven Digital Full Flow for the Neoverse V2 Platform

The AI-driven Cadence RTL-to-GDS digital full flow RAKs for 3 nm and 5 nm nodes includes the Genus Synthesis Solution, Modus DFT Software Solution, Innovus Implementation System, Quantus Extraction Solution, Tempus Timing Solution and ECO Option, Voltus IC Power Integrity Solution, Conformal Equivalence Checking, Conformal Low Power and the AI-based Cadence Cerebrus Intelligent Chip Explorer.

The digital RAKs provide Arm Neoverse V2 designers with benefits. For example, the Cadence Cerebrus AI capabilities automate and scale digital chip design. Cadence iSpatial technology provides an integrated and predictable implementation flow for the faster design closure.

The RAKs also include a smart hierarchy flow that delivers optimal turnaround times on large, high-performance CPUs. The Tempus ECO technology offers signoff-accurate final design closure based on path-based analysis. The RAKs incorporate the GigaOpt activity-aware power optimization engine to reduce dynamic power consumption.

AI-Driven Verification Full Flow Support for Arm Neoverse V2

The Cadence AI-driven verification full flow optimized to support Arm Neoverse V2 includes the Xcelium Logic Simulation Platform, Palladium Enterprise Emulation Platforms, Protium Enterprise Prototyping Systems, Helium Virtual and Hybrid Studio, Jasper Formal Verification Platform, Verisium Manager Planning and Coverage Closure tools, Perspec System Verifier, and VIP and System VIP tools and content for Arm-based designs.

The Cadence verification full flow provides Neoverse V2 designers with pre-silicon server base system architecture (SBSA) compliance verification and optimized PCI Express (PCIe) integration. The Cadence Helium Virtual and Hybrid Studio includes editable virtual and hybrid platform reference designs for Neoverse V2, incorporating Arm Fast Models to jumpstart early software development and verification. The Helium gearshift technology enables customers to position workloads in a high-performance hybrid environment before shifting to a fully accurate RTL environment, offering detailed verification using either the Palladium or Protium platforms.

“The growing demand for complex workloads such as big data analytics, HPC and ML inference requires specialized compute solutions that achieve greater performance and efficiency,” says Eddie Ramirez,vice president of go-to-market, Infrastructure Line of Business at Arm.“Through this latest collaboration, customers can leverage Cadence’s comprehensive digital and verification flows to validate their solutions and bring the power of their Neoverse V2-based products to market faster.”

“Customers are always looking to accelerate the pace of innovation, and the Arm Neoverse V2 platform provides the foundation needed to address advanced compute requirements for data center silicon success,” says Kam Kittrell, vice president, product management in the Digital & Signoff Group at Cadence. “Through our expanded collaboration with Arm, customers using the AI-driven digital full flow 3nm and 5nm RAKs for Neoverse V2 designs benefit from improved productivity and faster time to tapeout.”

The Cadence digital and verification flows support the Cadence Intelligent System Design strategy, enabling customers to achieve SoC design excellence. To learn more about how to verify your Arm-based designs using digital and verification solutions from Cadence, click here.

Sources: Press materials received from the company and additional information gleaned from the company’s website.

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